FDPs ATTENDED:

• Acted as Coordinator for  A National Level Winter Faculty Development Programme On VLSI Chip Design Hands-On Using Open Source EDA from 16th December 2019 to 20th December 2019.

• Acted as Coordinator for a FDP on “VLSI CHIP DESIGN HANDS ON USING OPEN SOURCE EDA” Organized by the E&ICT Academy, IIT Guwahati - 2019

• Attended a FDP on “ADVANCEMENT IN SIGNAL PROCESSING AND OPTIMIZATION TECHNIQUIES” Organized by the E&ICT Academy, IIT Guwahati - 2019

• Attended a FDP on “DEEP LEARNING AND APPLICATIONS” Organized by the E&ICT Academy, IIT Guwahati - 2019

• Attended a FDP on “OPTIMIZATION OF PROCESS PARAMETERS BY LINEAR REGRESSION USING MATLAB” held in CMR College, Hyderabad.

• Attended a FDP on “FIN-FET TECHNOLOGY” Organized by Thirumala Engineering College, Narasaraopeta.

• Attended a FDP on “INTELLIGENT SIGNAL PROCESSING AND CONTROL SYSTEM DESIGN USING BIO-INSPIRED ALGORITHMS” Organized by the E&ICT Academy, NITW .

• Attended an FDP on “RECENT TRENDS IN SIGNAL PROCESSING” Organized by the E&ICT Academy, NITW , at ECE ,KITS, Vinjanampadu.

• Attended an FDP on “INTELLIGENT ELECTRONIC SYSTEMS DESIGN” Organized by the E&ICT Academy, NITW , at ECE ,KITS, Vinjanampadu.

CONFERENCES ATTENDED:

• participated  in the YOUNG SCIENTIST'S CONFERENCE as a part of "INDIA INTERNATIONAL SCIENCE FESTIVAL-2019" held at Kolkatta During November 5th to 8th 2019.He has also presented a paper on the theme "Digital India" titled "Smart crop protection System from Animals using Rasberry pi".

• Presented a paper entitled “HOLD CUBE MINIMIZATION FOR LOW POWER BASED ON  LINEAR FEEDBACK SHIFT REGISTERS” in the international Conference on Methodologies    and Communication( ICCMC 2017), organized by Surya Engineering College during july 18- 19,2017,at Erode,Tamil Nadu.

• Presented a paper entitled “ HIGH SPEED AND AREA EFFICIENT SHIFT REGISTERS USING REVERSABLE GATES” in the 3rd international Conference on NCKIETS-2019 Organized by KKR & KSR Institute of Technology and College during march 15- 17,2017,at Guntur, Andhra Pradesh.

• Presented a paper entitled “ LAYOUT AND SYNTHESIS OF 32*32 BIT MULTI-PRECISION RECONFIGURABLE MULTIPLIER BY THE USE OF VERILOG HDL” in the Conference  Organized by OSMANIA UNIVERSITY, HYDERABAD on 15th October 2017.

FDPs ORGANIZED:

• Act as a Coordinator for FDP on “VLSI CHIP DESIGN HANDS ON USING OPEN SOURCE EDA” Organized by the E&ICT Academy, IIT Guwahati - 2019

OTHER INFORMATION:

• Permanent Member in ISTE.

• Organizing committee member in NCKITS-2017 & 2018  held at ECE dept., KITS, Vinjanampadu.

• Participated A Three day national workshop on Real Time DSP Implementation on TMS 320C6713 DSK.